Kilo-instruction Multiprocessors


Kilo-instruction Multiprocessors

The idea of this cluster is to exploit the characteristics of the checkpoint-based architecture of the Kilo-Instruction Processors to model a multiprocessor system with many interesting features.

In that respect we have detailed a design for a Kilo-Instruction Multiprocessor based on Implicit Transactions. Leveraging the checkpointing mechanism, the proposal considers all data accesses belonging to a checkpoint as an Implicit Transaction, where “implicit” means without any change on the executed parallel application. This way, the instructions corresponding to each checkpoint are executed out of order, but atomicity is preserved among checkpoints from different processors by snooping on a shared bus.

Now we want our proposal to be scalable by introducing the use of a directory-based system. The basic idea is to assign a unique timestamp to all of the memory instructions in the same checkpoint, and the directory coherence mechanism is augmented to correctly detect the messages that would imply a collision between different checkpoints, based on their timestamps.

The Implicit Transaction system is being implemented in Simics, which is a highly modular simulator. The basic mechanisms of the Kilo-Instruction Proccessor have been modelled with the Simics MAI, the simulator interface to model processor microarchitecture. The snoopy bus memory subsystem together with the consistency controller has been also implemented using Simics. The directory memory subsystem, among with the checkpoint management, is being modelled with GEMS to take advantage of previous work related with TM systems and checkpoint-based architectures. This last piece of work is at an advanced stage of development.

Other current and future work includes:

• Extensively evaluating the Implicit Transactional system first using scientific workloads and later using commercial workloads.
• Evaluate in detail the coherence protocols and the collision mechanisms: effect of the directory latency overheads, the effect of variable checkpoint sizes, different abort policies, different speculative data sharing policies, etc.
• Study the possibility of providing hardware acceleration to software transactional memory systems with a checkpoint-based architecture and other hardware mechanisms.
• Transactional memory systems are often related to speculative mechanisms that allow the concurrent execution of critical sections or the execution beyond a locked barrier. So it seems obvious that we can do research in this direction. Therefore, we also want to take care of these speculative mechanisms to incorporate them to our final design, to improve existent mechanisms or even to design new specific ones.
• Thread-level speculation can be seamlessly integrated within the Kilo-Instruction Multiprocessor framework. In order to support transactional memory programming models efficiently, it becomes important to study policies and mechanisms for reduction of miss-speculation and load imbalance overhead. This topic will also be studied within this cluster.

The project will mainly involve the collaboration between three European universities: the UPC in Barcelona (Spain), the University of Cantabria in Santander (Spain), and the Chalmers University of Technology in Gothenburg (Sweden). Furthermore, the collaboration will also include other important researchers around the world, being one of them James E. Smith from the University of Wisconsin-Madison (USA).


Research cluster

Requested: € 90520

Requested: € 14400

Based on the following prices:

- Travel: round trip GOT-BCN/person (800 Euros)
- Travel: round trip Santander-BCN/person (400 Euros)
- Travel: round trip GOT-Santander/person (800 Euros)
- Stay: Barcelona 1 day/person (120 Euros)
- Stay: Göteborg 1 day/person (200 Euros)
- Stay: Santander 1 day/person (100 Euros)

We will need:

2 meetings in Barcelona (3 days/each): (2800 + 1800) x 2 = 9200 euros
- Travel: 2 x 800 + 3 x 400 = 2800 euros
- Stay: 3 x 5 x 120 = 1800 euros

2 meetings in Santander (3 days/each): (2800 + 1500) x 2 = 8600 euros
- Travel: 2 x 800 + 3 x 400 = 2800 euros
- Stay: 3 x 5 x 100 = 1500 euros

2 meetings in Göteborg (3 days/each): (4800 + 3600) x 2 = 16800 euros
- Travel: 6 x 800 = 4800 euros
- Stay: 3 x 6 x 200 = 3600 euros

4 HiPEAC Cluster meetings (3 days/each): (4800 + 2880) x 4 = 30720 euros
- Travel: 8 x 600 = 4800 euros approx. (depending on where the meeting is located)
- Stay: 3 x 8 x 120 = 2880 euros approx. (depending on where the meeting is located)

3 months stay – M. M. Waliullah in Barcelona: 5000 euros
- Travel: 800 euros
- Stay: 4200 euros

4 weeks stay – Mafijul Islam in Barcelona: 2200 euros
- Travel: 800 euros
- Stay: 1400 euros

4 weeks stay – Marco Galluzzi in Santander: 1800 euros
- Travel: 400 euros
- Stay: 1400 euros

4 weeks stay – Enrique Vallejo in Barcelona: 1800 euros
- Travel: 400 euros
- Stay: 1400 euros

Fellowship requested at UPC, Barcelona (Spain)
12 months, 1200 euros/month. Total = 14400 euros


Requested: 12 month(s)

STENSTROM Per (Chalmers University of Technology) (--member--)
VALERO Mateo (UPC) (--member--)
BEIVIDE Ramon (University of Cantabria) (--member--)
CRISTAL Adrián (Barcelona Supercomputing Center) (--colleague--)
PUENTE VARONA Valentin (University of Cantabria) (--colleague--)
GALLUZZI Marco (UPC) (--phd student--)
VALLEJO Enrique (University of Cantabria) (--phd student--)
WALIULLAH M. M. (Chalmers University of Technology) (--phd student--)
ISLAM Mafijul (Chalmers University of Technology) (--phd student--)

Fernando Vallejo, University of Cantabria (Spain)
James E. Smith, University of Wisconsin-Madison (USA)