Extends:
Embedded multithreaded processors for hard and soft real-time systems

Status:
1133 / Accepted / Finalized / Evaluated

Description:

With this cluster we propose the extension of the “Embedded multithreaded processors for hard and soft real-time systems”
In the previous phases of our research, we had several objectives that stand for this cluster as well.
- We will research on the application of multithreading in embedded processors in order to determine the best trade-off between performance and resource sharing. On the one hand, a high resource sharing (SMT) implies that the performance per resource is higher and a high interference between threads, which causes more variable execution times. On the other hand, a reduced resource sharing (like CMPs) causes much smaller execution time variability, but implies that many hardware resources are duplicated increasing area and cost of the chip.
- Develop hardware and software techniques which increase performance but ensure an effective WCET analysis. Dynamic schemes will certainly be necessary, but these schemes will have to be easily analyzable. We are going to consider various approaches in order to increase performance while keeping a reasonably complex static analysis; it is probably a combination of them which will allow us to meet both objectives.
- Research on hard real-time architectures is needed because the applications (mainly in automotive, aeronautics and space) render current embedded hardware solutions obsolete. Indeed, these applications will require much more performance than today while preserving the need for a static WCET analysis to determine and guarantee the maximum execution time of a task.

Another key aspect in embedded systems is power consumption and energy use. Part of the effort of this cluster is devoted in that direction. Marco Paolieri will devote 6 months to integrate the Wattch power simulator the SMTSim currently in use in BSC. The objective is to have a tool that provides estimations of both performance and power. This tool will be given to the other partners of the cluster.

Nature:
Research cluster

Total funding:
Requested: € 44650
Granted: € 44650

Including fellowship funding:
Requested: € 20400
Granted: € 20400

Description of how the funding will be used:

We plan to do 3 more cluster meetings. Some partners have some remaining money for travels from previous calls. For this reason they request less money for trips here.
- UPC: 1people x 3trips x 1000(each trip) 3000
- University of Augsburg: 2people x 2trips x 1000(each trip) 4000
- University of Toulouse: 1people x 1trips x 1000(each trip) 1000
- Rapita: 1people x 3trips x 2000(each trip) 6000
- University of Karlsruhe: 2people x 3trips x 1000(each trip) 6000
- TOTAL: 3000+4000+1000+6000+6000=20000euro

1 student fellowship at UPC (6 months): 6 x 1200 = 7200. Marco Paolieri (Ph D student at UPC) will add Wattch power simulator into SMTSim performance simulator. As a result BSC will provide the other partners a simulator able to estimate both performance and power.

Stay of Marco Paolieri, 1week at University of Augsburg. 150 euro per day plus 300 euro for the trip: 150x7+300=1150 euro. Marco will acquire knowledge in the use of CarCore Simulator form Augsburg. CarCore is one of the simulators currently in use in the cluster.

Stay of Guillem Bernat (2 weeks) at BSC: Early cooperation between BSC and Rapita Systems in an early visit in 2007 by Dr Bernat (that is already a HiPEAC memember) to BSC explored opportunities for providing isolation of real-time concurrent threads. This problem is a natural fusion of parallel lines of work in which both Rapita and BSC are world experts. The aim of the stay is to consolidate this line of work, to define a workplan and set of experiments and define the master structure of a journal paper to be completed later in 2008. 200 euro per day plus 300 euro for the trip: 200x14+300=3100 euro.

1 student fellowship at Toulouse (6 months): 6 x 2200 = 13200 euro. The aim of the student is to define and develop a way to calculate the worst-case execution time of a hard real-time thread executing on the CarCore processor of Augsburg. We already acquired the knowledge on CarCore so no associated stay is needed.

Survey:
- Trips: 20000 euro
- Fellowship student UPC (6months) 7200 euro
- 1-week stay of Marco Paolieri in Augsburg 1150 euro
- 2-week stay of Guillem Bernat in BSC 3100 euro
- Fellowship student Toulouse (6months) 13200 euro
-------------------------------------------------------
- TOTAL BUDGET REQUESTED: 44650 euro

Duration of the funding:
Requested: 0 month(s)
Granted: 0 month(s), starting on: Thu, September 27, 2007

Participating members:
VALERO Mateo (UPC) (--member--)
UNGERER Theo (University of Augsburg) (--member--)
SAINRAT Pascal (CNRS) (--member--)
CAZORLA Francisco (Barcelona Supercomputing Center) (--member--)
RAMIREZ Alex (UPC) (--member--)
BRINKSCHULTE Uwe (University of Karlsruhe) (--member--)
KLUGE Florian (University of Augsburg) (--phd student--)
UHRIG Sascha (University of Augsburg) (--colleague--)
FARRALL Glenn (INFINEON) (--member--)
HUFELD Knut (INFINEON) (--member--)
ZALMAN Rafael (INFINEON) (--colleague--)
BERNAT Guillem (Rapita Systems) (--member--)

Other people collaborating:

Christine Rochange, CNRS

Miscellaneous: