1. Goals

CoSy is one of the two compiler platforms chosen by the HiPEAC network
of excellence. This project aims at bringing together the CoSy
community within HiPEAC and to stimulate work on a common research
programme.

The goal of this collaboration is to investigate the current
limitations in the exploitation of instruction set extensions for
configurable processors. While individual problems in this area such
as instruction identification have been studied in the past, many
important problems are still open. Among these problems are the
missing integration of instruction set extensions in a complete
processor design flow, microarchitecture issues such as the
integration of synthesised functional units in the processor pipeline,
and the poor support from optimising compilers.

All partners behind this proposal are already active in different
areas of configurable architectures and their compilers and have built
up substantial knowledge in their respective areas, i.e. configurable
architecture design (Edinburgh), design and validation flow for
instruction set extensions (Aachen and Imperial College), flexible
compiler technology (ACE), adaptive compilation and iterative
microarchitecture synthesis (Edinburgh). The proposed project will
leverage the complementary areas of expertise (Aachen, Imperial:
design flow, tool chains; Edinburgh: adaptive compilation,
architecture design; ACE: compiler infrastructure) and enable the
partners to bundle their resources.

2. Project Summary

RWTH Aachen, Edinburgh University, Imperial College London and ACE
plan to establish a cooperation on combined processor and compiler
optimisation for configurable embedded architectures. Within this
project, dependencies between application specific instruction set
extensions and compiler technology to efficiently target these
extensions will be investigated. Both RWTH Aachen and Imperial
College will focus on design and validation flows and technology to
extend configurable processors with custom instructions to adapt a
baseline architecture to a new application or a new application
domain. Researchers at Edinburgh University have a strong background
in adaptive compilation and the design and iterative microarchitecture
synthesis of configurable embedded processors, and will focus on both
the architecture design and the compiler technology to optimally
exploit the resources provided by the hardware. ACE will provide the
underlying CoSy compiler infrastructure, which is already being used
by all three academic partners, and its extensive knowledge on
possible ways to extend this tool set for the new challenges in
targeting a configurable processor with potentially complex
application specific instruction set extensions.

3. Collaboration

The collaboration between all partners will be established through a
number of mutual visits of about one week's duration after an initial
meeting of the project leaders from all partners. These visits provide
not only the opportunity to exchange and discuss ideas, but also have
the potential to open up wider ranges of possibilities for an
intensive and problem directed collaboration.

Rather than frequent, but short meetings we intend to maximise value
for money of this project through a number of meetings of intensive
collaboration to identify specific research problems in and to develop
technical approaches to co-synthesising extensions to an instruction
set whilst simultaneously generating compiler stages that can
efficiently target these extensions.

4. Compiler Infrastructure

The compiler infrastructure development of this collaborative project
will be based on the ACE CoSy compiler development system, which is
already in use at all three academic sites: Aachen, Edinburgh and
Imperial College London. CoSy is also one of the two officially
supported compiler platforms by the HiPEAC NoE.

Funding will be used to allow a number of mutual visits of about one week's duration after an initial meeting of the project leaders from all partners. These visits provide not only the opportunity to exchange and discuss ideas, but also have the potential to open up wider ranges of possibilities for an
intensive and problem directed collaboration.

Rather than frequent, but short meetings we intend to maximise value for money of this project through a number of meetings of intensive collaboration to identify specific research problems in and to develop
technical approaches to co-synthesising extensions to an instruction set whilst simultaneously generating compiler stages that can efficiently target these extensions.

We envisage several active research collaborations involving PhD students and PostDocs between the three academic partners. These will make it necessary to have sufficient funding to allow for repeated one week visits to develop new ideas and to turn them into practical systems at a later stage. Furthermore, an active collaboration between the academic partners and ACE as the provider of the CoSy compiler infrastructure is sought. Fields of cooperation range from short training courses for PhD students working with CoSy up to meetings with technical developers to study possibilies of extending CoSy with technology developed at the academic sites.

Rob Dimond, Imperial College London
Timothy Jones, University of Edinburgh
Stefan Kraemer, RWTH Aachen
Hans van Someren, ACE
Wayne Luk, Imperial College London
Joseph van Vlijmen, ACE