Seminar: "Efficient Resource Management for Large Scale Parallelism"

Dear colleague,

BSC-DAC-UPC invite you to attend on-line the following talk:

-Title: Efficient Resource Management for Large Scale Parallelism
-Speaker: Christos Kozyrakis (Stanford University)
-Date: Mon 26, 12:00 CET

How to follow the talk on-line: http://www.ac.upc.edu/seminars

If you would like to ask questions to the speaker, please send an e-mail to seminar@hipeac.ac.upc.edu

Best regards,

Enric Morancho

Efficient Resource Management for Large Scale Parallelism
Christos Kozyrakis (Stanford University)

Abstract

Multi-core chips will soon include hundreds of cores, support thousands of hardware threads, and feature deep memory hierarchies with non-uniform latency characteristics. To maximize efficiency from such systems, we must carefully manage resources (cores, memory, and interconnect) in a manner that balances performance and power consumption, improves both load balance and locality, and minimizes management overheads.

This talk will present early work on resource management for large-scale multi-core systems at the Pervasive Parallelism Lab (PPL) in Stanford University. PPL is investigating software and hardware techniques for pervasive parallelism based on programs written in domain specific languages (DSLs). First, we will discuss how to scale a user-level runtime environment for a DSL to hundreds of cores and NUMA latencies. We will show that by carefully reconsidering the algorithms and data-structures, we can improve speedup by up to 19x for highly parallel applications. Second, we will discuss separation of functions and interfaces between user-level runtimes and the operating system. We will also show how to overcome scalability issues in virtual memory operations for shared-memory operating systems like Linux. Finally, we will describe simple hardware support for fine-grain parallelism that allows for the development of low-overhead, software-mostly runtime systems that scale efficiently to hundreds of hardware threads. We will show that the proposed runtimes can exceed the performance of hardware-only scheduling by up to a factor of 2x.

Bio

Christos Kozyrakis is an Associate Professor of Electrical Engineering & Computer Science at Stanford University. He received a BS degree from the University of Crete (Greece) and a PhD degree from the University of California at Berkeley (USA), both in Computer Science.

Christos works on architectures, runtime environments, and programming models for parallel computer systems. At Berkeley, he developed the IRAM architecture, a novel media-processor system that combined vector processing with embedded DRAM technology. At Stanford, he lead the Transactional Coherence and Consistency (TCC) project at Stanford that developed hardware and software mechanisms for programming with transactional memory. He has also investigated security systems and power management techniques for data-centers. Currently, he is a member of the Pervasive Parallelism Lab, a multi-faculty effort to make parallel computing practical for the masses.

Christos is the Willard R. and Inez Kerr Bell faculty scholar at Stanford University. He is also a senior member of the ACM and the IEEE. He has received the NSF Career Award, an IBM Faculty Award, the Okawa Fundantion Research Grant, and a Noyce Family Faculty Scholarship.