This application aims at integrating our research activities on reconfigurable computing with other research on the same topic within the HiPEAC sphere. We are seeking support to partcipate in the workshops on Reconfigurable Computing arranged at the regular cluster meetings four times per year. This application is for travel and lodging costs for the next 12 months.

Our approach - called FlexSoC - aims to develop new architectural techniques for the complex processors necessary for high-performance embedded systems. One of our driving examples is the high-performance cellular phone. Many present-day cellular phones have features (such as games, 3d graphics, video playback, and wireless Internet connectivity) which until recently were only available in high-performance desktop computers. Moreover, in the cell-phone case, these features must be delivered in a package small enough to fit a purse or a pocket, and at fractions of the price and power dissipation of a desktop system.
The power dissipation is an especially vexing problem for a cellular phone. A high dissipation has many undesired consequences: batteries drain too quickly, or must otherwise be large and heavy; elaborate and costly heat-removal arrangements must be employed; and reliability is also adversely affected. Finally, the environmental load of consumer-electronics products is dominated by the power used in the field, so lower dissipation makes a product more environmentally friendly.
Although a cellular phone is used as an example here, the benefits of low power dissipation and ease of programming would be welcome in most embedded-processor applications. Software development costs are large for all complex embedded systems; power requirements directly affects the manufacturing cost for power supplies and enclosures.

The goals of the FlexSoC program requires a radical remodeling of the processor architecture. Instead of the present-day solutions, where a general-purpose microcontroller orchestrates a collection of special-purpose "accelerators", we envision a network of simpler heterogeneous datapath elements, controlled through reconfigurable instruction-stream decoding. Innovations in circuit design, in computer architecture, and in compiler techniques will all be necessary to bring this vision closer to reality. For more details about the project, please visit http://www.flexsoc.org/intro.shtml

The project currently involves five faculty members in the areas of compilers, computer architecture, and VLSI and two PhD students. We have had a joint meeting with Stamatis Vassiliadis's group at Delft to discuss opportunities for collaboration in June. With this application, we want to join forces with this group and other groups within HiPEAC.

We are seeking support to participate in the workshops arranged at the regular cluster meetings in Reconfigurable Computing. We anticipate that about half of the FlexSoC personnel (4 people) will participate in these meetings.

Travel costs for one person: 1000 EU (600 (flight) + 250 (hotel) + 150(per-diem) = 1000 EU).

Travel costs for 4 persons and 4 meetings: 16,000 EU

PhD student not yet in the list of members:
Magnus Själlander