Driven by the trend towards multi-core and many-core processors, future computer systems will consist of a large pool of resources. This is the case at the on-chip level in which multiple cores and caches are integrated on a single chip, as well as at the cross-chip level, e.g., a large number of processor chips and memories are interconnected to build a data center. Managing this large pool of resources is complex. For one, as a system designer, we want to maximize overall system throughput. And at the same time, we want to guarantee fairness, i.e., all tasks should make equal progress. Some applications need performance isolation and others, such as soft real-time applications, even need performance guarantees. Partitioning the resources given these constraints is challenging. To make things even worse, future computer systems will feature (and many of today's systems already do feature) shared resources like processor core issue queues and functional units in Simultaneous Multithreading (SMT) processors, or shared caches and/or shared off-chip bandwidth in a Chip-Multiprocessor (CMP), etc. This complicates the understanding of system performance significantly because tasks interact with each other through the shared resources. It is to be expected that as the number of (shared) resources increases, resource management will become increasingly challenging -- it is a hard problem yet today, and is likely to become even harder in the near future.

We envision performance modeling as the key solution to managing the resources in future computer systems. The important benefit of performance modeling is that, once the model is built, performance estimates can be made instantaneously. This would enable at run time resource management through system software, e.g., through a Virtual Machine Monitor (VMM).

There are three major research challenges that need to be addressed within this context. First, we need to build analytical performance models for accurately modeling multi-core processor performance with shared resources, and for making accurate trade-offs in the resources assigned to each task. Second, we need to build mechanisms and policies for communicating performance profiles from hardware to software. These performance profiles will serve as input to the analytical models built in system software for driving the resource management. In addition, we need mechanisms for imposing a resource partitioning from system software to hardware.

The participating members in this proposal (Ghent University, Uppsala University/ACUMEM, and the University of Patras) bring in their respective and complementary expertise. The expertise at Ghent University lies in analytical and statistical superscalar processor performance modeling. In addition, Ghent University's recent work in collaboration with James E. Smith from the University of Wisconsin--Madison, on counter architectures for building accurate CPI stacks was selected for the IEEE Micro Top Picks 2007 -- the counter architecture will be an important component in computing the performance profiles that need to be communicated from hardware to software. The expertise of Uppsala University/ACUMEM and the University of Patras lies in the modeling of shared resources, as demonstrated through the jointly developed StatShare tool which estimates cache miss rates of shared cache for concurrently executing tasks. In addition, the StatShare tool comes with a mechanism for collecting memory reference reuse distributions online with very limited overhead. Given the complementarity of the participating members, we are confident that we will be successful in our goals. We will strive at publishing this research in a premier conference.

The cluster addresses the following HiPEAC roadmap challenges:
1.5 -- Transparent Micro-architecture
1.6 -- Software-Controlled Reconfiguration
1.9 -- Virtualization
4.5 -- Instrumentation and Performance Analysis
5.3 -- Architecture/Compilation Cooperation
5.7 -- Full-System Optimization
6.1 thru 6.4 -- Run-Time Systems

We request for a grant for one PhD student, George Anderson, starting on Jan 1, 2008 until August 30, 2008 (8 months). George Anderson obtained his MS degree from Colorado State University in 1999. He currently is a lecturer at the University of Botswana, and has general expertise in system architecture. The PhD student will be based at Ghent University. The cost for the PhD student for a period of 8 months equals 28,000 euro plus 2,000 euro for covering his travel expenses from Botswana to Ghent.

In addition, we ask for travel money for the PIs and the PhD students to travel between the sites (Ghent, Uppsala, Patras). We plan on four one-week trips for two persons. We estimate this cost to be 4 x 2 x 1,500 = 12,000 euro.

As such, the total budget requested is 42,000 euro.

We plan on starting this research project as soon as possible, and we expect it to take a year to complete.

David Eklov, PhD student at Uppsala University