This is an ongoing collaboration between Margaret Martonosi (Princeton) and Stefanos Kaxiras (Univ. of Patras). Martonosi is funded by NSF for this collaboration and in the summer of 2005 sent a Princeton student, Gilberto Contreras, to spend the summer (3 months) in Patras, under the supervision of Kaxiras. The collaboration is continuing with the same student.

The subject of the collaboration is dynamic modulation of parallelism in Chip-Multiprocessors. Below is a technical abstract decsribing on-going work:

Hardware Support for Dynamic Modulation of Concurrent Threads
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CMP architectures promise to offer ample parallelism by replicating computational
resources. Exposing such large amounts of parallelism in software, however, has
always been a challenging task.
For applications that do take advantage of concurrent computation, load balancing
becomes the primary concern as different processor may exhibit wide execution-time
variability due to unbalanced input datasets, computational shortcuts, and even
hardware variability under thermal emergencies or reliability issues; concerns which
may be difficult or even impossible to captured through offline analysis.

This work proposes a set of architectural features in the context of low-latency
chip-multiprocessors capable of alleviating many of these problems through the use of
low-overhead thread operations and a new aggressive multithreading programming model.
These two features provide our CMP architecture the capacity to dynamically
adapt to runtime system variability by (1) duplicating (cloning) slave threads based
on how much work is available and (2) by dynamically scheduling work to available
slave threads based on how fast they are able to process work.
Our multithreading model is implemented as an extension to the C programming language
and used in synthetic benchmarks as well as several publicly-available applications
exhibiting a wide-range of thread granularities. Thread cloning and hardware-based
management of threads allow the system to gracefully adapt
to application load-imbalance, thermal emergencies, and technology variations;
factors that affect present and future CMP system ranging from the tenths to hundreds
of processors.

Trips to Princeton for Patras researchers (Kaxiras and/or students) for the specific project.

Margaret Martonosi, Princeton